This patch sets the cpu type based on the hawkeye value read from the IDCODE register. So far, cpu type was hardcoded. Signed-off-by: Sanjeev Premi <premi@xxxxxx> --- arch/arm/mach-omap/include/mach/sys_info.h | 5 +++++ arch/arm/mach-omap/omap3_generic.c | 14 +++++++++++++- 2 files changed, 18 insertions(+), 1 deletions(-) diff --git a/arch/arm/mach-omap/include/mach/sys_info.h b/arch/arm/mach-omap/include/mach/sys_info.h index 4396720..f9df51c 100644 --- a/arch/arm/mach-omap/include/mach/sys_info.h +++ b/arch/arm/mach-omap/include/mach/sys_info.h @@ -81,6 +81,11 @@ #define HS_DEVICE 0x2 #define GP_DEVICE 0x3 +/** + * Hawkeye definitions to identify silicon families + */ +#define OMAP_HAWKEYE_34XX 0xB7AE + /** These are implemented by the System specific code in omapX-generic.c */ u32 get_cpu_type(void); u32 get_cpu_rev(void); diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c index a079f38..cd9aceb 100644 --- a/arch/arm/mach-omap/omap3_generic.c +++ b/arch/arm/mach-omap/omap3_generic.c @@ -70,7 +70,19 @@ EXPORT_SYMBOL(reset_cpu); */ u32 get_cpu_type(void) { - /* FIXME: need to get register defines for 3430 */ + u32 idcode_val; + u16 hawkeye; + + idcode_val = readl(IDCODE_REG); + + hawkeye = get_hawkeye(idcode_val); + + if (hawkeye == OMAP_HAWKEYE_34XX) + return CPU_3430; + + /* + * Fallback to OMAP3430 as default. + */ return CPU_3430; } -- 1.7.2.2 _______________________________________________ barebox mailing list barebox@xxxxxxxxxxxxxxxxxxx http://lists.infradead.org/mailman/listinfo/barebox