Hi,
Op donderdag 19 september 2024 22:06:24 CEST schreef Andy Shevchenko:
> On Thu, Sep 19, 2024 at 09:51:48PM +0300, Serge Semin wrote:
> > The recently submitted fix-commit revealed a problem in the iDMA32
> > platform code. Even though the controller supported only a single master
> > the dw_dma_acpi_filter() method hard-coded two master interfaces with IDs
> > 0 and 1. As a result the sanity check implemented in the commit
> > b336268dde75 ("dmaengine: dw: Add peripheral bus width verification") got
> > incorrect interface data width and thus prevented the client drivers
> > from configuring the DMA-channel with the EINVAL error returned. E.g. the
> > next error was printed for the PXA2xx SPI controller driver trying to
> > configure the requested channels:
> >
> > > [ 164.525604] pxa2xx_spi_pci 0000:00:07.1: DMA slave config failed
> > > [ 164.536105] pxa2xx_spi_pci 0000:00:07.1: failed to get DMA TX descriptor
> > > [ 164.543213] spidev spi-SPT0001:00: SPI transfer failed: -16
> >
> > The problem would have been spotted much earlier if the iDMA32 controller
> > supported more than one master interfaces. But since it supports just a
> > single master and the iDMA32-specific code just ignores the master IDs in
> > the CTLLO preparation method, the issue has been gone unnoticed so far.
> >
> > Fix the problem by specifying a single master ID for both memory and
> > peripheral devices on the ACPI-based platforms if there is only one master
> > available on the controller. Thus the issue noticed for the iDMA32
> > controllers will be eliminated and the ACPI-probed DW DMA controllers will
> > be configured with the correct master ID by default.
>
> Tested-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> Seems this fixes the bug I have seen.
> Ferry, can you confirm?
I was testing something else and broke my setup :-( I’ll fix that and test this patch this weekend.
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