On Tue, Jan 20, 2015 at 04:21:35PM +0100, Heiko Stübner wrote:
> Hi Guenter, Greg,
>
> Am Dienstag, 20. Januar 2015, 06:24:13 schrieb Guenter Roeck:
> > Error log:
> > drivers/clk/rockchip/clk-rk3188.c:215:50: error: macro "PLL" passed 11
> > arguments, but takes just 10 RK2928_MODE_CON, 0, 5, 0, rk3188_pll_rates),
> > ^
> > drivers/clk/rockchip/clk-rk3188.c:214:11: error: 'PLL' undeclared here (not
> > in a function) [apll] = PLL(pll_rk3066, PLL_APLL, "apll", mux_pll_p, 0,
> > RK2928_PLL_CON(0), ^
> > drivers/clk/rockchip/clk-rk3188.c:217:38: error: macro "PLL" passed 11
> > arguments, but takes just 10 RK2928_MODE_CON, 4, 4, 0, NULL),
> > ^
> > drivers/clk/rockchip/clk-rk3188.c:219:71: error: macro "PLL" passed 11
> > arguments, but takes just 10 RK2928_MODE_CON, 8, 6, ROCKCHIP_PLL_SYNC_RATE,
> > rk3188_pll_rates), ^ drivers/clk/rockchip/clk-rk3188.c:221:72: error: macro
> > "PLL" passed 11 arguments, but takes just 10 RK2928_MODE_CON, 12, 7,
> > ROCKCHIP_PLL_SYNC_RATE, rk3188_pll_rates), ^ make[3]: ***
> > [drivers/clk/rockchip/clk-rk3188.o] Error 1
> >
> > Caused by patch 'clk: rockchip: fix rk3066 pll lock bit location'.
>
> Commit 4f8a7c549f37 ("clk: rockchip: add ability to specify pll-specific flags")
> changed the number of arguments of the macro before the failing commit. So
> either this commit must be present too, or the "0" elements before the
> rkxxxx_pll_rates argument removed.
>
> Below is the failing commit adapted to the 3.18 environment
Many thanks, I've now updated the version in the tree with this one.
greg k-h
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