Hi,
On 30-01-2020 17:52, Andy Shevchenko wrote:
On Thu, Jan 30, 2020 at 6:04 PM Hans de Goede <hdegoede@xxxxxxxxxx> wrote:
On 30-01-2020 17:02, David Laight wrote:
I have no idea. Andy if you can find any docs on the MSR_FSB_FREQ values
for Merriefield (BYT MID) and Moorefield (CHT MID) that would be great,
if not I suggest we stick with what we have.
First of all, Merrifield (Silvermont based Atom for phones, FYI: Intel
Edison uses it) and Moorefield (Airmont) have nothing to do with code
names Baytrail and Cherrytrail respectively.
So, please don't confuse people.
Ok, sorry, I've prepped a v2 of this patch in my local tree with
the following changelog:
Changes in v2:
-Do not refer to Merrifield / Moorefield as BYT / CHT, they only share the
CPU core design and otherwise are significantly different
I'll try to find some information.
OK, I'll wait a bit with sending out the v2 then.
Regards,
Hans
