Re: Where does 1586 and i686 break?

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Antonio Gallardo wrote:
Hi:

Your PII is part of the 686 family. I think the frontier frontier between
585 and 686 is:

Last 585 was Pentium MMX
First 686 is Pentium Pro
Next 686: PII.


Don't forget the Pentium Pro is actually the start of the i686 chain.


The version of the 2.5.70 kernel with MMX seemed to be sort of sluggish.


Not at all. And not always. Remeber that in order to use new instructionsm
there must be a compiler that take advanatage of the new instruction set.
Call it MMX, SSE, SSE2, etc.

The 585 family does not have the new instruction set called SSE. This is
the diference.



The 686 compiled Red Hat versions seem to work alright. My processor
information is below. Which is part of my confusion.

processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 5
model name      : Pentium II (Deschutes)

flags           : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca
cmov pat pse36 mmx fxsr

I think the family is not a good indicator for calling it 686 or 786, etc.
I use a P4 and here is the info of this proc:

Interesting comparison! I am starting to understand the additional instruction sets that each processor can interpret. i'll have to learn more about what benefit ther varied ones include. I assume that a few instruction sets do the same things, but in different ways.

processor : 0 vendor_id : GenuineIntel cpu family : 15 model : 2 model name : Intel(R) Pentium(R) 4 CPU 2.00GHz stepping : 7 cpu MHz : 1990.226 cache size : 512 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 2 wp : yes flags : fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm bogomips : 3971.48

But since the family is "15" I cannot tell it is a 1586.

I guess the number is really not too related to x86 numbering then. .....

Every PII always have the MMX instruction set builtin.


There is no such thing as a PII without MMX.  The only i686 processor
without MMX is the P-Pro.


I'll try to compile my next kernel as an i686, then another as an i586, to see which is the best for this slow machine.


Its not a bad idea. You can also try compiling for 486 and 386.

This might give me an indicator as to what instruction set usage is the best for this machine.... How the compiler knows what instruction set to use, with the same C code, sounds like a miricle in itself.



If you are very interested in define the diference between 585 and 686 I recomend you to check the intel web site and search for white papers about this.

They make them, so thanks for the lead to Intel having the page. i'll give it a read through.


Jim


Best Regards,


Antonio Gallardo.




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