On 9/18/2023 9:58 AM, Dave Hansen wrote:
> On 9/18/23 09:51, Joseph, Jithu wrote:
>>
>> On 9/18/2023 9:29 AM, Ilpo Järvinen wrote:
>>
>>> In this case it is not just about the bitfield itself nor the bit
>>> allocation order but sharing the storage unit with another member, and to
>>> further complicate things, members have different alignment requirement
>>> too (32-bit aligned u8 followed by u32 bitfield).
>>>
>> I too verified that the size of the whole structure matches that of MSR 64 bits (8 bytes).
>>
>> Initially when IFS scan was added the all MSR structure members were bit-fields, later there was a suggestion to
>> use basic C types if applicable during subsequent Array BIST patch series. I followed this approach with the current patch series .
>>
>> I will change the current series to use all bit-field MSR structures in v2, given mixing basic types and bitfields is a a source of confusion
>
> That's the wrong direction. :)
>
> What is more obviously correct. This:
>
> struct {
> u16 valid_chunks;
> u16 total_chunks;
> u8 error_code;
> u8 rsvd1;
> u8 rsvd2;
> u8 rsvd3;
> };
>
> or this:
>
> struct {
> u16 valid_chunks;
> u16 total_chunks;
> u32 error_code :8;
> u32 rsvd :24;
> };
I will go with the second pattern above, given that pattern can be followed for other MSR structures too, where fields doesn't split as evenly
Jithu
