Changes in v2 - remove duplicate initializations from ifs_array_test_core() (Dave Hansen, patch 4/7) - remove bit parsing from tracing fast path to tracing output (Steven Rostedt, patch 5/7) - move "ATTRIBUTE_GROUPS(plat_ifs_array)" to core.c and remove exporting function ifs_get_array_groups() (Greg KH, patch 3/7) - Generalized doc and ABI doc (Greg KH, patches 6/7 and 7/7) v1 submission: Link: https://lore.kernel.org/lkml/20230131234302.3997223-1-jithu.joseph@xxxxxxxxx/ Array BIST is a new type of core test introduced under the Intel Infield Scan (IFS) suite of tests. Emerald Rapids (EMR) is the first CPU to support Array BIST. Array BIST performs tests on some portions of the core logic such as caches and register files. These are different portions of the silicon compared to the parts tested by Scan at Field (SAF). Unlike SAF, Array BIST doesn't require any test content to be loaded. Jithu Joseph (7): x86/include/asm/msr-index.h: Add IFS Array test bits platform/x86/intel/ifs: Introduce Array Scan test to IFS platform/x86/intel/ifs: Sysfs interface for Array BIST platform/x86/intel/ifs: Implement Array BIST test platform/x86/intel/ifs: Trace support for array test platform/x86/intel/ifs: Update IFS doc Documentation/ABI: Update IFS ABI doc arch/x86/include/asm/msr-index.h | 2 + drivers/platform/x86/intel/ifs/ifs.h | 41 +++++-- include/trace/events/intel_ifs.h | 25 +++++ drivers/platform/x86/intel/ifs/core.c | 85 ++++++++++----- drivers/platform/x86/intel/ifs/runtest.c | 102 +++++++++++++++++- drivers/platform/x86/intel/ifs/sysfs.c | 10 +- .../ABI/testing/sysfs-platform-intel-ifs | 8 +- 7 files changed, 233 insertions(+), 40 deletions(-) base-commit: ceaa837f96adb69c0df0397937cd74991d5d821a -- 2.25.1
