On Tue, 18 Jun 2019 08:58 -07:00, Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> wrote: > On Tue, Jun 18, 2019 at 10:48:45AM -0400, Valdis Klētnieks wrote: > > On Tue, 18 Jun 2019 11:40:34 +0300, Andy Shevchenko said: > > > > > Yes. Most of the SoCs from Intel use GPIO IP based on Chassis specification, > > > the drivers for which are available under drivers/pinctrl/intel. What you are > > > looking for is located under PINCTRL_SUNRISEPOINT configuration option. > > > > Thanks for the info, it's often unclear where to look - when the hardware has > > a PCH and documentation that says it has GPIO, and there's an in-tree driver > > called gpio_pch, it's easy to fail to look in the right place :) > Thank you for the info, indeed. I'm going to give it a try. > Citing in-kernel documentation: > > --- 8< --- 8< ---- 8< --- > > Electrical properties of the pin such as biasing and drive strength > may be placed at some pin-specific register in all cases or as part > of the GPIO register in case (B) especially. This doesn't mean that such > properties necessarily pertain to what the Linux kernel calls "GPIO". > Given the amount of related (and not so much) documentation, it's hard to miss. That's what this newsgroup for :) Thank you for helping! _______________________________________________ Kernelnewbies mailing list Kernelnewbies@xxxxxxxxxxxxxxxxx https://lists.kernelnewbies.org/mailman/listinfo/kernelnewbies
