On 11/19/2017 09:56 PM, Max Filippov wrote:
> On Sat, Nov 18, 2017 at 7:36 PM, ayaka <ayaka@xxxxxxxxxxx> wrote:
>> What I want is a relaxed version of the io{read,write}32, as I don't need to
>> flush between I am writing the registers table into the registers. I only
>> want to flush the cache at the last and isolated register which I will set
>> later.
> None of these functions do anything with cache. And with
> devm_ioremap_resource you will likely get an uncached mapping of your
> IO memory, so you don't even need to manage cache.
I didn't notice that the IO memory is not cached at the most platform,
even the ldd3 have said that.
> What you still need to preserve the order of writes is a memory barrier,
> and none of io{read,write}32 do it either. You can insert proper barrier
> before the write to that last isolated register.
I see, thank you.
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