On 11/18/2017 11:50 PM, Max Filippov wrote:
> On Thu, Nov 16, 2017 at 12:12 PM, ayaka <ayaka@xxxxxxxxxxx> wrote:
>> #if 1
>> for (i = 0; i < count; i++) {
>> u32 *cur = (u32 *)buffer;
>> u32 pos = offset + i * 4;
>>
>> cur += i;
>> mpp_debug(DEBUG_SET_REG, "write reg[%03d]: %08x\n",
>> pos / 4, *cur);
>> iowrite32(*cur, mpp_dev->reg_base + pos);
>> }
>> #else
>> iowrite32_rep(mpp_dev->reg_base + offset, buffer, count);
>> mb();
>> for (i = 0; i < count; i++) {
>> u32 cur = 0;
>> u32 pos = offset / 4 + i;
>>
>> cur = ioread32(mpp_dev->reg_base + pos * 4);
>> pr_info("get reg[%03d]: %08x\n", pos, cur);
>> }
>> #endif
> The loop with iowrite32 writes consecutive u32 words from buffer
> to consecutive IO memory locations. But iowrite32_rep writes
> consecutive u32 words from buffer to the same IO memory location.
> So they do different things when count > 1.
>
Thank you I think that explain why it doesn't work.
What I want is a relaxed version of the io{read,write}32, as I don't
need to flush between I am writing the registers table into the
registers. I only want to flush the cache at the last and isolated
register which I will set later.
Is there any suggest about that?
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