Hi Prabhu, Sending to the list this time... On Wed, Oct 13, 2010 at 9:23 PM, Prabhu nath <gprabhunath@xxxxxxxxx> wrote: > Hi Dave, > > Please clarify my questions/understanding written inline. > ...snip... >> UARTs don't access the memory bus. Your driver accesses the UART >> registers and puts characters in the FIFO. The UART takes the data >> from the FIFO and puts them on the serial lines. No memory access >> required (by the UART). Of course the CPU had to read the characters >> from memory and put them into the UART, but that was the CPU accessing >> the memory bus, not the UART. > > I feel memory bus you are referring is system bus. In that case, plz clarify > the following. > CPU sending data to the UART registers/FIFO should be through the system > bus, right? Sure - let's call it a a system bus. The name doesn't really matter. > In that case UART device should be sitting on the system bus. > On the return path, if there is data coming from the serial line, it will > fill or half fill the FIFO based on the configuration, then the CPU has to > read data from the FIFO of UART. This data has to be sent through the system > bus. > > If all what I said is right, then UART should be accessing system/memory > bus. The UART just writes the data into the FIFO. This typically causes an interrupt when the FIFO reaches appropriate levels, and the CPU responds to the interrupt by reading the data out of the FIFO and putting it into memory. So it's still the CPU that reads the data from the FIFO and puts it into memory. ...snip... -- Dave Hylands Shuswap, BC, Canada http://www.DaveHylands.com/ -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
