HI Greg, On Wed, Oct 13, 2010 at 3:54 PM, Greg Freemyer <greg.freemyer@xxxxxxxxx> wrote: ...snip... > In a standard PC design, don't you have 2 arbitrators? Quite possibly. I've barely done any linux development on the PC, and do most of my development on embedded ARM systems. The exact details will vary from chip to chip, but the general concepts are the same. Each bus should have its own arbiter (although not all arbiters are programmable), and you can have many busses in a system, it depends on the peripherals and what you're trying to do. The PC is bit more rigid in its expectations, but ARM SOCs seem to vary from chip to chip. > The Northbridge which typically just arbitrates memory access between > the ultra highspeed devices (CPU, Video, PCIexpress, South Bridge and > sometimes highspeed sata interfaces). > > And the South Bridge which arbitrates between all the slower devices / buses? > > I _assume_ that even a relatively fast device like a sata controller > sitting on a traditional PCI bus is too slow to directly talk to the > memory bus, so the south bridge acts as a high-speed buffer for dma > requests going to and from memory via the northbridge. I think it's just an architecture design thing. I often DMA from relatively slow devices like audio at 8 kHz into memory. Samples typically accumulate in a small buffer (part of the audio circuitry) and are then burst onto the memory bus. There just happens to be lots of time between the bursts. -- Dave Hylands Shuswap, BC, Canada http://www.DaveHylands.com/ -- To unsubscribe from this list: send an email with "unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx Please read the FAQ at http://kernelnewbies.org/FAQ
