Xiangfu Liu writes:
Hi Matze
try this code,
I think you should only output when [ev.type == 1]:
you can find the whole source code at :http://projects.qi-hardware.com/index.php/p/fn-handle/source/tree/master/
--------------
fd = open(argv[1], O_RDONLY);
struct input_event ev;
while (1) {
read(fd, &ev, sizeof(struct input_event));
if(ev.type == 1) {
printf("key %i state %i\n", ev.code, ev.value);
switch (ev.code) {
case KEY_POWER:
system("poweroff");
break;
default:
break;
}
}
}
Thanks, but thats the problem. You can see in gpio-keys kernel code, that
after a key event a sync event will be created. But I don't know why. Also
I don't understand the behaviour I explained in my first email.
Your code is what I'm doing right now, but I want to understand why it is
created like this.
Matze wrote:
Xiangfu Liu writes:
Hi
your mean you press key one time. the userspace program output more
then two line.(should one line for press. one line for release)
Yes.
what is your userspace program code?
fd = open(device_name, O_RDONLY);
if(fd < 0){
fprintf(stderr,"failed to open %s: %s\n", device_name, strerror(errno));
return 1;
}
while(1)
{
if(read(fd, &event, sizeof(event)) < 0)
perror("read error");
else
{
printf("Type %d Code %d Value %d \n",
event.type, event.code, event.value);
}
}
you should look into your CPU data sheet. is the GPIO init correct.
I did set an internal pullup and glitch filter. To trigger the Pins I
set them to low. In board specific setup:
static struct gpio_keys_button wismit_button[] =
{
{.desc = "SW0", .gpio = GPIO_PIN_PD(6), .active_low = 1, .code = KEY_0,
.type = EV_KEY, },
};
Matze wrote:
Hello,
I have some doubts about the gpio-keys behaviour.
inside the gpio_keys_isr for every EV_KEY occured there will also a
EV_SYN
created. What for?
I've a userspace program reading the /dev/input/event0 device in a
loop and
printing event, code and value to the shell. So I observe that sometimes
there occur more than one EV_SYN for one EV_KEY. Where are they created?
My output looks e.g. like this:
Type 1 Code 11 Value 1
Type 0 Code 0 Value 0
Type 0 Code 0 Value 0
Type 0 Code 0 Value 0
Type 0 Code 0 Value 0
Type 0 Code 0 Value 0
Type 1 Code 11 Value 0
Type 0 Code 0 Value 0
Regards,
Matthias
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--
Xiangfu Liu
Email: xiangfu at qi-hardware dot com
Web: http://www.qi-hardware.com
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