Re: Where is obj parameters comes from?

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 scripts/Kbuild.include:

 # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
 # Usage:
 # $(Q)$(MAKE) $(build)=dir
 build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj

851PHONY += $(vmlinux-dirs)
852$(vmlinux-dirs): prepare scripts
853        $(Q)$(MAKE) $(build)=$@
============================================================
'coz build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
then $(vmlinux-dir):
            make -f $(if
$(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj=$(vmlinux-dir)

vmlinux-dir see below:
================================================================
root Makefile:

 621ifeq ($(KBUILD_EXTMOD),)
 622core-y          += kernel/ mm/ fs/ ipc/ security/ crypto/ block/
 623
 624vmlinux-dirs    := $(patsubst %/,%,$(filter %/, $(init-y) $(init-m) \
 625                     $(core-y) $(core-m) $(drivers-y) $(drivers-m) \
 626                     $(net-y) $(net-m) $(libs-y) $(libs-m)))
 627
 628vmlinux-alldirs := $(sort $(vmlinux-dirs) $(patsubst %/,%,$(filter %/, \
 629                     $(init-n) $(init-) \
 630                     $(core-n) $(core-) $(drivers-n) $(drivers-) \
 631                     $(net-n)  $(net-)  $(libs-n)    $(libs-))))
 632
 633init-y          := $(patsubst %/, %/built-in.o, $(init-y))
 634core-y          := $(patsubst %/, %/built-in.o, $(core-y))
 635drivers-y       := $(patsubst %/, %/built-in.o, $(drivers-y))
 636net-y           := $(patsubst %/, %/built-in.o, $(net-y))
 637libs-y1         := $(patsubst %/, %/lib.a, $(libs-y))
 638libs-y2         := $(patsubst %/, %/built-in.o, $(libs-y))
 639libs-y          := $(libs-y1) $(libs-y2)
 640



2009/3/2 Pei Lin <telent997@xxxxxxxxx>:
> See the scripts/Makefile.build.
> first line is src := $(obj)
> So src = arch/mips/kernel
> # The filename Kbuild has precedence over Makefile
>  kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
>  kbuild-file := $(if $(wildcard
> $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
>  include $(kbuild-file.
> ...
> # Built-in and composite module parts
>  $(obj)/%.o: $(src)/%.c FORCE
>              $(call cmd,force_checksrc)
>              $(call if_changed_rule,cc_o_c)
>
>
> AFAIK,i think the details in the scripts/Makefile.build and it is the
> common makefile.
>
> 2009/2/28 Peter Teoh <htmldeveloper@xxxxxxxxx>:
>> i think u are asking how does Makefile works.   I only understand some
>> aspect of it...not its entirety....which can be very powerful and
>> complex....suficient to generate my modules and integrate with the
>> rest of kernel.
>>
>> http://www-subatech.in2p3.fr/~photons/subatech/soft/srt/html/c2470.html
>> http://www.cs.duke.edu/~ola/courses/programming/Makefiles/node1.html
>> http://sunsite.ualberta.ca/Documentation/Gnu/make-3.79/html_chapter/make_3.html
>>
>> for all practical purposes, it is better to just take an existing
>> sample, and work from there....which means u have to spent some time
>> finding a good sample on the Internet......instead of spending time
>> learning all the details and write one of your own....my 2cts....
>>
>> On Fri, Feb 27, 2009 at 2:42 AM, MEHMET ALI EKICI
>> <mehmet.ekici@xxxxxxxxxxxxxx> wrote:
>>> Hi Peter,
>>> I also wonder much how build system works. I read the kbuild
>>> documentation but it is not clear to me.
>>> Would you please give us some guidence about algotihmic work of build
>>> system?
>>> Makefile   includes xxx file, the xxx file defines such parameters it
>>> then includes yyyy file etc.
>>> I hope it would not be too boring to you ?
>>>
>>> Thanks,
>>
>> --
>> Regards,
>> Peter Teoh
>>
>> --
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>>
>>
>

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