Re: Where is obj parameters comes from?

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it is recursive by nature:

In Makefile.build u see the following:

PHONY += $(subdir-ym)
$(subdir-ym):
        $(Q)$(MAKE) $(build)=$@


And build is defined in scripts/Kbuild.include:

###
# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
# Usage:
# $(Q)$(MAKE) $(build)=dir
build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj

and shown in the remarks statement above, the "build" variable is used
to construct the whole string: "$(Q)$(MAKE) $(build)=dir".

On Thu, Feb 26, 2009 at 3:57 PM, loody <miloody@xxxxxxxxx> wrote:
> Dear all:
> While compiling the kernel, I find the command like below:
> "make -f scripts/Makefile.build obj=arch/mips/kernel".
> It seems we build the kernel by passing different obj to
> "scripts/Makefile.build"
> Where is the for loop to iteratively passing different obj to Makefile.build?
> Appreciate your help,
> miloody
>
> --
> To unsubscribe from this list: send an email with
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>



-- 
Regards,
Peter Teoh

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