Hi ,
Every local APIC on processor ? pentium 3 and similar contain a register called as TPR(Task priority register).
TPR is used to compute the priority of the current process.Well also, Intel expects this register to be modified by the kernel in each context switch. But i never encountered any such TPR register updating code in kernel till date. Have you people encountered it somehwre?please send me pointers to the code if you have seen this.
APICs also have a arbitration priority register which is somewhat functionally similar to memory arbitrer circuit used to serialize physical memory access.Intel manuals also state that if a kernel does not updates the TPR(see above) on context switches, the performance may drop because as i see at it - the priority arbitrer reg in local APIC wont be able to decide the priority among CPUs running same priority tasks(all are lowest priorities on a SMP system i must say) based on the tasks running , instead it will decide the priorty randomly(defnitely a function of nothing instead of function of running task priority).
So this means Linux must somehow update this TPR on context switches for effecting distribution of interrupts on massively parallel SMP systems e.g while running a single kernel image over a highly scalable SMP system.
Where is this code, which __must__ be of the form __asm__ volatile {...} ; <--- or on simmilar lines.
Can you help? have you seen this code somewhere or is it compleletly hidden from Linux.If so who takes care of updating this register?
2nd query why did intel keep a TPR on local APIC?(out of curiosity i am asking).Are there any specific reasons apart from this arbitration policy for interrupts?
Thanks in advance.
--pradeep
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