On 3/8/07, Tzahi Fadida <Tzahi.ML2@xxxxxxxxx> wrote:
On Thursday 08 March 2007 10:30, Anupam Kapoor wrote:
> On 3/8/07, Tzahi Fadida <Tzahi.ML2@xxxxxxxxx> wrote:
> > On Wednesday 07 March 2007 20:45, Stuart Macdonald wrote:
> > > If you are on IA32 architecture then memory reads and writes are atomic
> > > provided that they don't cross a cache line.
> >
> > And how do i make sure of that? declare the variable head volatile?
>
> don't use volatile in the kernel. straight from horse's mouth :
I don't understand, LDD3 uses volatile in drivers. Now they say i can't.
What is the alternative?
>
> http://thread.gmane.org/gmane.linux.kernel/423487/focus=424677
>
> anupam
--
Regards,
Tzahi.
Interesting, that thread is recommending "optimization barriers". I
wasn't familiar with those.
syntax example:
for (int i=0; i<10; i++)
{
a[i] = *ina;
barrier();
b[i] = *inb;
}
And the description is:
It's a full optimization barrier; the compiler assumes all
register and memory content has changed from before the barrier(), and
it will start "fresh".
Greg
--
Greg Freemyer
The Norcross Group
Forensics for the 21st Century
--
To unsubscribe from this list: send an email with
"unsubscribe kernelnewbies" to ecartis@xxxxxxxxxxxx
Please read the FAQ at http://kernelnewbies.org/FAQ
