Re: Low Level Interrupt Handling

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>Ok, fine as you said that we set interrupt vector offsets to 0x20 and 0x28
for PIC1 and PIC2 respectively, yes it there in this code, but I am not able
to understand 
>that what is the use of setting these vector offset in PIC when PIC is not
making use of it while sending the bit string (IDT vector number) to CPU,
PIC does make use of the vector numbers 0x20 and 0x27. In a normal PC using
8259, there will be two PICs in cascaded mode and the they needs to be
programmed as to what vector number corresponds to which IRQ line,  also on
interrupt, the processor (atleast in x86 based machines), expects PIC to
send it the vector number, so that it can locate the relevent ISR address in
the IDT. You can download the 8259 data sheet where this is explained and
compare it with the linux code. 

        



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