Re: I/O caching prob

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, Apr 01, 2004 at 10:07:35 +0530, Mandeep Singh Sandhu wrote:
> hi all,
> 
> i'm facing a problem while reseting a chip.
> to reset the chip (RTL8139) i write a byte into it's
> command reg. and wait for the a bit to be 0 which
> indicates that the reset is complete.
> 
> to test this bit i had first written a tight while loop
> as follows
> 
> while((readb(ChipCmdReg) & ResetCmd) == 0);

Didn't you say you are waiting for it to become ZERO? This loop waits
for it to become NON-zero.

> but the comp used to hang when it used reach this loop.
> it never came out.
> 
> then i wrote:
> i = 1000;
> while(i)
> 	if((readb(ChipCmdReg) & ResetCmd) == 0)
> 		break;
> 	else
> 		i--;
> 
> this worked!

And on which condition did it exit? That's quite important, don't you
think?

-------------------------------------------------------------------------------
						 Jan 'Bulb' Hudec <bulb@ucw.cz>

Attachment: signature.asc
Description: Digital signature


[Index of Archives]     [Newbies FAQ]     [Linux Kernel Mentors]     [Linux Kernel Development]     [IETF Annouce]     [Git]     [Networking]     [Security]     [Bugtraq]     [Yosemite]     [MIPS Linux]     [ARM Linux]     [Linux RAID]     [Linux SCSI]     [Linux ACPI]
  Powered by Linux