On Mon, Aug 06, 2018 at 08:54:10PM +0200, Alexandre Belloni wrote: > The Microsemi Ocelot I2C controller is a designware IP. It also has a > second set of registers to allow tweaking SDA hold time and spike > filtering. > > Cc: Rob Herring <robh+dt@xxxxxxxxxx> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> > Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx> > --- > .../bindings/i2c/i2c-designware.txt | 9 ++++- Please split binding patches. > drivers/i2c/busses/i2c-designware-core.h | 3 ++ > drivers/i2c/busses/i2c-designware-platdrv.c | 40 +++++++++++++++++++ > 3 files changed, 50 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt b/Documentation/devicetree/bindings/i2c/i2c-designware.txt > index fbb0a6d8b964..7886f2dc6675 100644 > --- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt > +++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt > @@ -2,7 +2,8 @@ > > Required properties : > > - - compatible : should be "snps,designware-i2c" > + - compatible : should be "snps,designware-i2c" or "mscc,ocelot-i2c" followed by > + "snps,designware-i2c" for fallback Please reformat to one valid combination per line. > - reg : Offset and length of the register set for the device > - interrupts : <IRQ> where IRQ is the interrupt number. > > @@ -11,8 +12,12 @@ Recommended properties : > - clock-frequency : desired I2C bus clock frequency in Hz. > > Optional properties : > + - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold > + time, named ICPU_CFG:TWI_DELAY in the datasheet. > + > - i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds. > - This option is only supported in hardware blocks version 1.11a or newer. > + This option is only supported in hardware blocks version 1.11a or newer and > + on Microsemi SoCs ("mscc,ocelot-i2c" compatible). > > - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds. > This value which is by default 300ns is used to compute the tLOW period.