On 10/06/2016 09:18 AM, Maciej W. Rozycki wrote:
Hi James,
This does look wrong to me, as I noted above EBase is 64-bit with MIPS64
processors as from architecture revision 3.50. Also I don't think we want
MIPS64 PRA (I'm looking at r5 and r6) seems to allow for write-gate not
to be implemented, in which case the register is only 32-bits.
Indeed, but we need to be prepared to handle the width of 64 bits and
`cpu_has_mips64r6' does not seem to me to be the right condition.
It is not the proper condition.
The presence of a 64-bit EBase should be probed for.
The proper check is to test of the EBase[WG] (bit 11) can be set to 1.
It it can, this indicates that EBase supports 64-bit accesses.
David.
