Hi Ralf,
On 21/09/16 14:08, Ralf Baechle wrote:
On Thu, Sep 01, 2016 at 05:30:07PM +0100, James Hogan wrote:
When reading the CP0_EBase register containing the WG (write gate) bit,
the ebase variable should be set to the full value of the register, i.e.
on a 64-bit kernel the full 64-bit width of the register via
read_cp0_ebase_64(), and on a 32-bit kernel the full 32-bit width
including bits 31:30 which may be writeable.
How about changing the definition of read/write_c0_ebase to
#define read_c0_ebase() __read_ulong_c0_register($15, 1)
#define write_c0_ebase(val) __write_ulong_c0_register($15, 1, val)
James added the {read,write}_c0_ebase_64 functions in
37fb60f8e3f011c25c120081a73886ad8dbc42fd, because performing a 64bit
access to 32bit cp0 registers (like ebase on 32bit cpus) was an
undefined operation pre-r6, so we can't always access them as longs.
or using a new variant like
#define read_c0_ebase_ulong() __read_ulong_c0_register($15, 1)
#define write_c0_ebase_ulong(val) __write_ulong_c0_register($15, 1, val)
to avoid the ifdefery? This could also make this bit
ebase = cpu_has_mips64r6 ? read_c0_ebase_64()
: (s32)read_c0_ebase();
This relies on being able to determine a 64bit value for ebase, either
by reading it in its entirety on a 64bit cpu (including on a 32bit
kernel) or sign extending it from a 32bit read.
Thanks,
Matt
in cpu-probe.c prettier.
Ralf
