At the moment ar913x_clocks_init() does not use extosc node at all,
the reference clock rate is hardcoded inside arch/mips/ath79/clock.c
#define AR913X_BASE_FREQ 5000000
...
static void __init ar913x_clocks_init(void)
{
ref_rate = AR913X_BASE_FREQ;
...
ath79_add_sys_clkdev("ref", ref_rate);
Also please see the commits 'MIPS: ath79: Fix the ar913x reference clock rate'
and 'MIPS: ath79: Fix the ar724x clock calculation' in Alban Bedel's
github ath79 branch https://github.com/AlbanBedel/linux/tree/ath79
Signed-off-by: Antony Pavlov <antonynpavlov@xxxxxxxxx>
Cc: Alban Bedel <albeu@xxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Cc: devicetree@xxxxxxxxxxxxxxx
---
arch/mips/boot/dts/qca/ar9132.dtsi | 3 ---
arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts | 10 ----------
2 files changed, 13 deletions(-)
diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi
index 13d0439..84787e30 100644
--- a/arch/mips/boot/dts/qca/ar9132.dtsi
+++ b/arch/mips/boot/dts/qca/ar9132.dtsi
@@ -87,9 +87,6 @@
"qca,ar9130-pll";
reg = <0x18050000 0x20>;
- clock-names = "ref";
- /* The board must provides the ref clock */
-
#clock-cells = <1>;
clock-output-names = "cpu", "ddr", "ahb";
};
diff --git a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
index a6108f8..10905f6 100644
--- a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
+++ b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
@@ -14,21 +14,11 @@
reg = <0x0 0x2000000>;
};
- extosc: oscillator {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <40000000>;
- };
-
ahb {
apb {
uart@18020000 {
status = "okay";
};
-
- pll-controller@18050000 {
- clocks = <&extosc>;
- };
};
spi@1f000000 {
--
2.6.2
