Re: [PATCH 1/2] MIPS: MSA: bugfix - disable MSA during thread switch correctly

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On 05/22/2015 04:20 PM, Ralf Baechle wrote:
On Fri, May 22, 2015 at 11:37:34AM -0700, Leonid Yegoshin wrote:

On 05/22/2015 02:38 AM, Ralf Baechle wrote:
Just move the call to finish_arch_switch().
It might be a problem later, then a correct MSA partiton starts working. It
should be tight to saving MSA registers in that case.

Your rewrite also dropped the if (cpu_has_msa) condition from
disable_msa() probably causing havoc on lots of CPUs which will likely not
decode the set bits of the MFC0/MTC0 instructions thus end up accessing
Config0. Ralf
Right before this chunk of code there is a saving MSA registers. Does it
causing a havoc or else?

May I ask you to look into switch_to macro to figure out how "if
(cpu_has_msa)" check works in this case?
Ah sorry I now see that your added code is not executed for all CPUs but
only those having MSA.  So then it's safe.

Still I don't stylistically like defining the register t4 in the middle
of the code.

Below my suggested patch.  It's advantage is that for non-MSA platforms
the call to disable_msa() will be removed entirely.

Something like Paul's http://patchwork.linux-mips.org/patch/10111/ (assuming
it's correct and tested) seems like a full cleanup but it's way too
complex for 4.1 or the stable kernels.

   Ralf


All 3 patches seems working (I tested), but if you don't like mine then I prefer Paul's patch more - it concentrates stuff more closely and removes some assembly stuff.

Besides that, it introduces lose_fpu_inatomic() which is needed for me :)

- Leonid.






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