On Fri, May 22, 2015 at 11:37:34AM -0700, Leonid Yegoshin wrote: > On 05/22/2015 02:38 AM, Ralf Baechle wrote: > >Just move the call to finish_arch_switch(). > > It might be a problem later, then a correct MSA partiton starts working. It > should be tight to saving MSA registers in that case. > > >Your rewrite also dropped the if (cpu_has_msa) condition from > >disable_msa() probably causing havoc on lots of CPUs which will likely not > >decode the set bits of the MFC0/MTC0 instructions thus end up accessing > >Config0. Ralf > > Right before this chunk of code there is a saving MSA registers. Does it > causing a havoc or else? > > May I ask you to look into switch_to macro to figure out how "if > (cpu_has_msa)" check works in this case? Ah sorry I now see that your added code is not executed for all CPUs but only those having MSA. So then it's safe. Still I don't stylistically like defining the register t4 in the middle of the code. Below my suggested patch. It's advantage is that for non-MSA platforms the call to disable_msa() will be removed entirely. Something like Paul's http://patchwork.linux-mips.org/patch/10111/ (assuming it's correct and tested) seems like a full cleanup but it's way too complex for 4.1 or the stable kernels. Ralf Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx> arch/mips/include/asm/switch_to.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h index e92d6c4b..7163cd7 100644 --- a/arch/mips/include/asm/switch_to.h +++ b/arch/mips/include/asm/switch_to.h @@ -104,7 +104,6 @@ do { \ if (test_and_clear_tsk_thread_flag(prev, TIF_USEDMSA)) \ __fpsave = FP_SAVE_VECTOR; \ (last) = resume(prev, next, task_thread_info(next), __fpsave); \ - disable_msa(); \ } while (0) #define finish_arch_switch(prev) \ @@ -122,6 +121,7 @@ do { \ if (cpu_has_userlocal) \ write_c0_userlocal(current_thread_info()->tp_value); \ __restore_watch(); \ + disable_msa(); \ } while (0) #endif /* _ASM_SWITCH_TO_H */
