On Fri, May 15, 2015 at 08:03:51PM +0200, Ralf Baechle wrote:
> > I'd prefer RTC state not to be touched at all if its state is sane.
> > That is read Register B, check for the only valid divider setting
> > (32kHz), and if so then exit right away, and otherwise initialise the
> > chip from scratch. Consistency with YAMON might be a good idea in that
> > initialisation, but I have no strong feeling towards that. If you think
> > there's value in having the chip set to the BCD mode, then feel free to
> > keep that option.
> >
> > Note that any inhibition of the RTC previously initialised by
> > temporarily setting the SET bit in Register B during bootstrap will
> > disturb timekeeping that the system may carry over reset using
> > adjtimex(8).
>
> So you're instead suggesting to revoke a87ea88d8f6c ?
>
> If YAMON and U-Boot are differing in RTC handling then I suggest to
> treat that as a U-Boot bug. YAMON was there first.
That would be fair enough, and is why I added RTC handling to Malta
U-boot at all. I could see logic in suggesting U-boot be changed to use
the binary mode instead of BCD. But...
> However these Malta kernels are also frequently booted without firmware
> in Qemu. No idea how Qemu initializes the RTC.
...kernels can also be booted on real Malta boards with minimal prodding
over JTAG, and the RTC is one more thing that you need to prod if the
kernel doesn't ensure it's running. That's what motivated a87ea88d8f6c
and the other patches from the same series at all.
Thanks,
Paul
