On Wed, May 13, 2015 at 11:50:49AM +0100, James Hogan wrote: > Use the new tlb read hazard macros from <asm/hazards.h> rather than the > local BARRIER() macro which uses 7 ops regardless of the kernel > configuration. > > We use mtc0_tlbr_hazard for the hazard between mtc0 to the index > register and the tlbr, and tlb_read_hazard for the hazard between the > tlbr and the mfc0 of the TLB registers written by tlbr. > > Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx> > Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> > Cc: linux-mips@xxxxxxxxxxxxxx Only to repeat for the benefit of the mailing list readers what I already wrote on IRC recently. The 7 NOPs sequence will send the uncached write-back buffer of the R4400 but not R4000 off-chip. This operation of course is entirely irrelevant to what the TLB dumper does - but it just so happens that seven NOPs are also sufficient to deal with TLB hazards on most CPUs. If we're lucky - it doesn't use SSNOPs or EHBs. Ralf
