On 10/11/2011 10:31 AM, Joe Buehler wrote:
David Daney wrote:
No, it does nothing of the sort. You need cacheflush() for that.
OK, I looked at cacheflush and it can be used to flush the icache on all
CPUs, which is what I want. My current code sequence is more than that
however. Something like this:
CVMX_ICACHE_INVALIDATE;
This only works if you can guarantee that the code will never be run on
a different CPU than the current one. For most Linux code you cannot
make such an assertion.
CVMX_SYNC;
Unneeded.
uint64_t tmp;
asm volatile (" la %0,10f\n"
" jr.hb %0\n"
" nop\n"
" 10:\n" : "=r" (tmp) : : "memory");
jr.hb is equivalent to jr on Octeon.
I can certainly modify cacheflush for my application so the extra hazard
clearing is done when icache is flushed. Is there any way to avoid that
and use existing kernel functionality?
I cannot parse the meaning out of these last two sentences. The
cacheflush() system call both exists and works. You want to change it?
David Daney