David Daney wrote:
> No, it does nothing of the sort. You need cacheflush() for that.
OK, I looked at cacheflush and it can be used to flush the icache on all
CPUs, which is what I want. My current code sequence is more than that
however. Something like this:
CVMX_ICACHE_INVALIDATE;
CVMX_SYNC;
uint64_t tmp;
asm volatile (" la %0,10f\n"
" jr.hb %0\n"
" nop\n"
" 10:\n" : "=r" (tmp) : : "memory");
I can certainly modify cacheflush for my application so the extra hazard
clearing is done when icache is flushed. Is there any way to avoid that
and use existing kernel functionality?
Joe Buehler
