Re: [PATCH 2/2] MIPS: Optimize TLB handlers for Octeon CPUs

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On 28/12/2010, David Daney <ddaney@xxxxxxxxxxxxxxxxxx> wrote:
> +#if defined(CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE) && \
> +    CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
> (...)
> +#else
> +static bool scratchpad_available(void)
> +{
> +	return false;
> +}
> +static int scratchpad_offset(int i)
> +{
> +	BUG();
> +}
> +#endif

This seems to have broken the build for any non-octeon mips build:

  CC      arch/mips/mm/tlbex.o
cc1: warnings being treated as errors
arch/mips/mm/tlbex.c: In function 'scratchpad_offset':
arch/mips/mm/tlbex.c:112: error: no return statement in function
returning non-void

Regards,
Jonas



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