Re: [PATCH 2/2] MIPS: Optimize TLB handlers for Octeon CPUs
[
Date Prev
][
Date Next
][
Thread Prev
][
Thread Next
][
Date Index
][
Thread Index
]
To
: David Daney <
ddaney@xxxxxxxxxxxxxxxxxx
>
Subject
: Re: [PATCH 2/2] MIPS: Optimize TLB handlers for Octeon CPUs
From
: Ralf Baechle <
ralf@xxxxxxxxxxxxxx
>
Date
: Tue, 28 Dec 2010 18:11:20 +0100
Cc
:
linux-mips@xxxxxxxxxxxxxx
In-reply-to
: <
1293502077-9196-3-git-send-email-ddaney@xxxxxxxxxxxxxxxxxx
>
User-agent
: Mutt/1.5.21 (2010-09-15)
Queued for 2.6.38. Thanks, Ralf
References
:
[PATCH 0/2] MIPS: Optimize TLB Refill for Octeon/Octeon2
From:
David Daney
[PATCH 2/2] MIPS: Optimize TLB handlers for Octeon CPUs
From:
David Daney
Prev by Date:
Re: [PATCH 1/2] MIPS: Add LDX and LWX instructions to uasm.
Next by Date:
[PATCH v3 03/16] MIPS: ath79: utilize the MIPS multi-machine support
Previous by thread:
[PATCH 2/2] MIPS: Optimize TLB handlers for Octeon CPUs
Next by thread:
Re: [PATCH 2/2] MIPS: Optimize TLB handlers for Octeon CPUs
Index(es):
Date
Thread
[Index of Archives]
[Linux MIPS Home]
[LKML Archive]
[Linux ARM Kernel]
[Linux ARM]
[Linux]
[Git]
[Yosemite News]
[Linux SCSI]
[Linux Hams]
