On Tue, Apr 13, 2010 at 09:34:38AM +0200, Thomas Bogendoerfer wrote: > On Tue, Apr 13, 2010 at 01:03:54PM +0800, Wu Zhangjin wrote: > > This patch have broken the support to the MIPS variants whose > > cpu_has_mips_r2 is 0 for the CAC_BASE and CKSEG0 is completely different > > in these MIPSs. > > I've checked R4k and R10k manulas and the exception base is at CKSEG0, so > about CPU we are talking ? And wouldn't it make for senso to have > an extra define for the exception base then ? C0_ebase's design was a short-sigthed only considering 32-bit processors. So the exception base is in CKSEG0 on every 64-bit processor, be it R2 or older. So yes, there is a bug as I've verified by testing but the patch is unfortunately incorrect. Ralf
