On 8/3/07, Ralf Baechle <ralf@xxxxxxxxxxxxxx> wrote: > On Fri, Aug 03, 2007 at 12:59:41PM +0200, Mohamed Bamakhrama wrote: > > > Hi all, > > I have one question regarding context switches between user and kernel > > modes and interrupts. Do they invalidate the I-cache or D-cache? > > Never on MIPS. > > I call an architecture that would require a cacheflush for such a > context switch totally broken and yes, they exist - but nothing from > the MIPS family. Thanks Ralf for your reply. The problem that I face now is that the lock works only when I lock the I-cache lines *just* before calling the function OR when I lock the code and execute it with all interrupts disabled (via local_irq_save() & restore()). I always do the lock with interrupts disabled, but the strange thing is that it works only when the lock is *close* enough to the code and in my case "close" means just before calling it :-( That's why I was wondering if the kernel is doing something strange with the I-cache such as invalidation on interrupts or other events. Greetings, -- Mohamed
