Re: Modpost warning on Alchemy

[Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>]

Sergei Shtylyov wrote:
> >  It is still just fine with ioremap() -- it will simply use KSEG2 in 
> > this case.  You cannot bypass the TLB here with a 32-bit processor no 
> > matter what.

> >  And regarding what you have written above and the size issue you 
> > mentioned in another e-mail (do you map the whole PCI config space 
> > linearly in the physical address space of the CPU or suchlike?) -- PCI 

>    No, I don't.  But that was why the original code preferred the wired 
> entry approach over ioremap() -- not to map a whole range...

   Not the only one: dynamic ioremap() seems to be impossible in interrupt 
context.

> > config space accesses are rare (by design rather than chance), so 

>    That depends on the drivers used (some IDE drivers access it really 
> often).

> > performance is a non-issue and it should be absolutely fine for you to 
> > call ioremap() and iounmap() in code specific for your PCI host bridge 
> > for the required fragment upon every access.  There is no need for a 
> > permanent 

>    That's an idea -- however, as the currecnt code uses a cached 

   No, it seems this actually is not an option. So, the path of least 
resistence should be taken.

WBR, Sergei