Hello. Dan Malek wrote:
The device interface just requires too much babysitting by the CPU to function, and the Linux interrupts have too much latency to guarantee the CPU can do what is necessary in a timely fashion. The same is
Note that AMD claims that the latency (and other) errata fixed in the late revs of their SOCs.
For Au1100, BE and BF revs are claimed to be errata-free. WBR, Sergei
