On Wed, 24 Nov 2004, Ralf Baechle wrote: > That interrupt disabling in some cache flushes dates back further than > CVS history. Seems once uppon a time there was some CPU which didn't > like cache flushes with interrupts enabled. This is rather bad for > latencies so unless somebody else on this list recalls a good reason > I'd like to remove this. Some R4600 (v1.1?) errata workaround? Or was it elsewhere? Maciej
