Karthi, > May i know the purpose of the NMI interrupt and > in what way it differ from the timer interrupt. On MIPS CPUs the NMI is a sort of second-class reset. You could use it for debugging and the kind of last-ditch everything-is-dead watchdog interrupt you might use in a high-availability system. Most systems don't connect it to anything. It's not for use for regular device interrupts at all. -- Dominic
