On Sun, 11 Jan 2004, [iso-8859-1] karthikeyan natarajan wrote: > The cache size is modified by setting the IC/DC > bits in the 'config' register. Seems they are set only > by the hardware during the processor reset. And also, > those bits are mentioned as read only bits.. You cannot modify the size of the primary caches -- the values are hardwired to the amount of cache available in the processor (8kB+8kB for the original R4000). However, if you take appropriate precautions, you can alter the line sizes of the caches by modifying appropriate bits of cp0.config. -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available +
