On Mon, Jan 12, 2004 at 01:51:55PM +0100, Maciej W. Rozycki wrote: > > The cache size is modified by setting the IC/DC > > bits in the 'config' register. Seems they are set only > > by the hardware during the processor reset. And also, > > those bits are mentioned as read only bits.. > > You cannot modify the size of the primary caches -- the values are > hardwired to the amount of cache available in the processor (8kB+8kB for > the original R4000). However, if you take appropriate precautions, you > can alter the line sizes of the caches by modifying appropriate bits of > cp0.config. On some systems that's a dangerous and won't work due to some issue with the memory controller. That's why Linux supports all possible combinations instead of reconfiguring caches. Of course there's also the hope that developers of a system did configure the cache for the optimal performance. The one system I recall where reconfiguring is not possible are certain revs of MIPS Magnum 4000 / MIPS Millenium / Olivetti M700-10 but I'm convinced there are others. If reconfiguring is possible 32-byte D-cache and I-Cache lines are probably the optimum for non-tiny systems. For the L2 cache I'd guess 64 or 128 byte lines. Ralf
