Re: [PATCH] Vr41xx unaligned access update

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On Fri, 23 May 2003, Geert Uytterhoeven wrote:

> @@ -145,8 +146,6 @@
>  	 * but the BD bit in the cause register is not set.
>  	 */
>  	case bcond_op:
> -	case j_op:
> -	case jal_op:
>  	case beq_op:
>  	case bne_op:
>  	case blez_op:
> @@ -155,7 +154,11 @@
>  	case bnel_op:
>  	case blezl_op:
>  	case bgtzl_op:
> -	case jalx_op:
> +		if (branch) {
> +		    /* branch in a branch delay slot */
> +		    goto sigill;
> +		}
> +		branch = 1;
>  		pc += 4;
>  		goto retry;

 Hmm, what tree is it against?  I can't see code matching these hunks in
our tree at linux-mips.org.

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +



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