Hi Ralf, Update fix for some (Vr41xx?) CPUs, where if an unaligned access happens in a branch delay slot and the branch is not taken, EPC may point at the branch instruction while the BD bit in the cause register is not set: - Remove tests for unconditional jumps, since they are always taken - Add test for a branch in a branch delay slot --- linux-mips-2.4.x/arch/mips/kernel/unaligned.c Mon May 5 16:23:43 2003 +++ linux/arch/mips/kernel/unaligned.c Tue May 6 14:24:56 2003 @@ -99,6 +99,7 @@ union mips_instruction insn; unsigned long value, fixup; unsigned int res; + int branch = 0; regs->regs[0] = 0; *regptr=NULL; @@ -145,8 +146,6 @@ * but the BD bit in the cause register is not set. */ case bcond_op: - case j_op: - case jal_op: case beq_op: case bne_op: case blez_op: @@ -155,7 +154,11 @@ case bnel_op: case blezl_op: case bgtzl_op: - case jalx_op: + if (branch) { + /* branch in a branch delay slot */ + goto sigill; + } + branch = 1; pc += 4; goto retry; Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds