Re: Au1500 hardware cache coherency

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 1 Apr 2003, Pete Popov wrote:

> > I'm not quite sure whether ld_mmu_mips32 is called after au1x00 setup, but if it is,
> > the bit is cleared, never to be set again. Maybe the c0_config macroes should be changed
> > due to errata #4?
> 
> I doubt Ralf is going to change common macros to fix a specific bug.

 You'd better ask instead of guessing.  I would see no problem with such a
workaround IF done cleanly. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +



[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux