Alan Cox wrote: > On Fri, 2002-10-04 at 13:11, Carsten Langgaard wrote: > > Is a bus error exception an address related exception ? > > I'm afraid some implementation think it's not. > > > > So you need an option for broken systems, no new news 8) > > > What about an UART RX register, we might loose a character ? > > You can also configure you system, so you get a external interrupt from you > > system controller in case of a bus error, there is no way the CPU can > > relate this interrupt to the prefetching. > > The use of memcpy for I/O space isnt permitted in Linux, thats why we > have memcpy_*_io stuff. Thus prefetches should never touch 'special' > spaces. (On x86 the older Athlons corrupt their cache if you do this so > its not a mips specific matter) That's exactly the problem. The actually loads and stores in memcpy is fine, it's the prefetching that prefetch too much. /Carsten -- _ _ ____ ___ Carsten Langgaard Mailto:carstenl@mips.com |\ /|||___)(___ MIPS Denmark Direct: +45 4486 5527 | \/ ||| ____) Lautrupvang 4B Switch: +45 4486 5555 TECHNOLOGIES 2750 Ballerup Fax...: +45 4486 5556 Denmark http://www.mips.com
