On 01/26/2015 07:44 PM, Jisheng Zhang wrote:
Dear Doug,
On Mon, 26 Jan 2015 09:01:37 -0800
Doug Anderson <dianders@xxxxxxxxxxxx> wrote:
Jisheng,
On Sun, Jan 25, 2015 at 10:22 PM, Jisheng Zhang <jszhang@xxxxxxxxxxx> wrote:
Specifically I see the register WDT_TORR that has an offset of 0x4.
That's the RANGE_REG in your code. It shows bits 3:0 set the timeout
period (0 = 0xffff and 15 = 0x7fffffff). It shows bits 31:4 as
"reserved".
Could you please dump registers' value at offset 0xf4 and 0xf8 if you
don't mind?
Those are not documented in the user manual that I have, but:
r(0xff8000f4)
0x10000a02
r(0xff8000f8)
0x3130332a
Hi Jisheng,
This translates to ascii "103*". How does it translate to "1.02a" ?
Thanks. Now I got some information about your platform:
wdt version: v1.02a
WDT_DUAL_TOP is configured as false, so there's no TOP_INIT
WDT_DFLT_TOP is configured as 0, so it will timeout soon.
Any chance you can provide the bit map for the register reporting
those flags ?
Thanks,
Guenter
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