Hello Guenter,
On 17 October 2014 23:28, Guenter Roeck <linux@xxxxxxxxxxxx> wrote:
> On 10/17/2014 09:12 AM, Abhilash Kesavan wrote:
>>
>> The watchdog mask bit offset listed for Exynos7 is incorrect.
>> Fix this.
>>
>> Signed-off-by: Abhilash Kesavan <a.kesavan@xxxxxxxxxxx>
>> ---
>> drivers/watchdog/s3c2410_wdt.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/watchdog/s3c2410_wdt.c
>> b/drivers/watchdog/s3c2410_wdt.c
>> index 8532c3e..1626dc6 100644
>> --- a/drivers/watchdog/s3c2410_wdt.c
>> +++ b/drivers/watchdog/s3c2410_wdt.c
>> @@ -161,7 +161,7 @@ static const struct s3c2410_wdt_variant
>> drv_data_exynos5420 = {
>> static const struct s3c2410_wdt_variant drv_data_exynos7 = {
>> .disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,
>> .mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,
>> - .mask_bit = 0,
>> + .mask_bit = 23,
>> .rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
>> .rst_stat_bit = 23, /* A57 WDTRESET */
>> .quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT,
>>
>
> Naveen, can you confirm / Ack ?
Sorry for the delay.
Acked-by: Naveen Krishna Chatradhi <naveenkrishna.ch@xxxxxxxxx
>
> Thanks,
> Guenter
>
--
Shine bright,
(: Nav :)
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