On 2/24/2012 2:43 PM, Lukasz Majewski wrote:
On Fri, 24 Feb 2012 14:12:11 +0530
Pratyush Anand<pratyush.anand@xxxxxx> wrote:
...
will need some testing help with other SoC vendors.
Yes, I can test it on SPEAr.
SPEAr = ST ARM processors?
Yes, ST's ARM Cortex-A9 based SOC.
And finally, I will work on the s3c-hsotg driver to became the dw2
mainline kernel driver.
I could not get it. If we decide to enhance s3c-otg then we need to
work on it first then to add other stuff.
If we decide for other option, then probably we need to discard this
driver finally.
Sorry, If I got your point incorrect. Please clarify.
My plan for s3c-hsotg (dwc2):
1. Division for vendor specific part and dwc2 handling code.
2. Support for Device mode only (this is what I can test with my HW)
3. Post it as initial dwc2 driver
4. Gain opinions from other dwc2 users/testing on other SoCs
5. Support for OTG
6. Testing/validation on other SoCs
7. Remove s3c-hsotg driver from mainline and use the new dwc2
Ok , got it.
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