Re: [PATCH 6/9] USB:s3c-hsotg: Extract core initialization function

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On Fri, 24 Feb 2012 14:12:11 +0530
Pratyush Anand <pratyush.anand@xxxxxx> wrote:

> On 2/24/2012 1:33 PM, Lukasz Majewski wrote:
> > On Fri, 24 Feb 2012 10:01:19 +0530
> > Pratyush Anand<pratyush.anand@xxxxxxxxx>  wrote:
> >
> >> Have looked driver drivers/usb/gadget/s3c-hsotg.c. It seems that,
> >> this driver has support of only device. So job would be to first
> >> make it platform independent, then to add support for "host only"
> >> and "otg" (hnp/srp) mode.
> >
> > Yes, indeed for now the s3c-hsotg supports the device mode.
> >
> > But as you wrote, first the driver needs to be made a platform
> > independent (the IP core common part), then vendor (e.g.
> > Samsung/others) dependent part shall be added.
> >
> >> If we see drivers floated by apm guys (dwc_otg), then yes it is big
> >> and ugly, but has support of all use case scenarios. With little
> >> effort its ugly part can be
> >> removed, but author is very slow and not ready to allow others to
> >> take initiative.
> >
> > I'm quite fresh on the linux-usb mailing list, but I've seen several
> > attempts to make the dw_otg (dwc2) driver mainline acceptable (v15
> > of Synopsys DWC OTG) with no success.
> >
> > I think, that starting from the device mode is good for beginning.
> > Other use cases can be added later, after some discussion on the
> > device mode implementation (Yes, architecturally the driver will be
> > prepared for OTG extension).
> 
> Sorry, if I could not get it correctly. Please correct me , if I am
> wrong. So, you suggest to have a fresh start (may be by extracting
> code from dwc_otg) only for device mode first and then we keep on
> adding other stuff.

No fresh start. The base for dwc2 device is already in mainline (the
s3c-hsotg driver). 

My idea for s3c-hsotg (dwc2) is described below.

> 
> >
> > As a side note, I can test the driver with Samsung devices, but I
> > will need some testing help with other SoC vendors.
> >
> 
> Yes, I can test it on SPEAr.

SPEAr = ST ARM processors? 

> 
> > And finally, I will work on the s3c-hsotg driver to became the dw2
> > mainline kernel driver.
> >
> 
> I could not get it. If we decide to enhance s3c-otg then we need to
> work on it first then to add other stuff.
> If we decide for other option, then probably we need to discard this 
> driver finally.
> Sorry, If I got your point incorrect. Please clarify.

My plan for s3c-hsotg (dwc2):

1. Division for vendor specific part and dwc2 handling code.
2. Support for Device mode only (this is what I can test with my HW)
3. Post it as initial dwc2 driver
4. Gain opinions from other dwc2 users/testing on other SoCs
5. Support for OTG
6. Testing/validation on other SoCs 
7. Remove s3c-hsotg driver from mainline and use the new dwc2

-- 
Best regards,

Lukasz Majewski

Samsung Poland R&D Center
Platform Group
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