Hi, On Wed, Dec 21, 2011 at 01:29:33AM +0000, Chen Peter-B29397 wrote: > > > the thing is that OTG adds a few extra bits and pieces to the PHY. For > > > example we have extra states on the USB state machine, we have a few > > > analog comparators (for VBUS and ID pin) and so on. So, when we _do_ > > > have OTG, some of it is handled by the PHY. > > > > One more question before I make the v9. If you have two PHYs but only > > one of the is OTG, how do you make sure the other PHY driver can not > > take advantage of OTG utility? > > > > Peter, didn't you say that this is what you guys have, two > > transceivers and only one of them is OTG? > > > Almost all Freescale i.MX SoCs have more than 1 USB Controllers, the > first one is OTG's. > The second (and Third/Fourth if have) one is Host only. Although the > phy between OTG and host only are the same, the host only controllers > have NO ID and VBUS pin in order to reduce the pin number of SoC. So > Host only controller has NO OTG feature. Just out of curiosity, is it the same IP instantiated multiple times or is it a different IP ? -- balbi
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