Re: usb3.0 not recognizing hard disk.

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On Wed, Aug 4, 2010 at 4:31 AM, Alan Stern <stern@xxxxxxxxxxxxxxxxxxx> wrote:
> On Tue, 3 Aug 2010, Sarah Sharp wrote:


> What was the exact failure case for fdisk?
> > Would it hang or would it quit with some sort of error message?


# fdisk /dev/sdb

Unable to open /dev/sdb


> Neither of these will help.  The usbmon log shows that the drive is
> claiming no medium is present.  usb-storage debugging will just show
> the same thing, and fdisk won't work.

Right. That was what I noticed before. linux/drivers/scsi/sd.c
sdkp->media_present = 0.

> > One thing I noticed is that your device is running in high speed mode.
> > It should have switched over to SuperSpeed mode after it was reset by
> > the USB core.  Can you get it to enumerate as SuperSpeed by plugging the
> > device in after an unload/reload of the xHCI driver?
>
> That may be related to the problem.  Perhaps the drive gets confused
> when trying to connect at SuperSpeed, and then falls back to high speed
> and stops working.

I've tried all sorts of things and combinations with unloading/loading
usb_storage and xhci_hcd.

Is this what you're looking for? It seems to have problem with the
"short transfer" ...


hub 3-0:1.0: unable to enumerate USB device on port 3
usb 3-1: new SuperSpeed USB device using xhci_hcd and address 2
xhci_hcd 0000:05:00.0: WARN: short transfer on control ep
xhci_hcd 0000:05:00.0: WARN: short transfer on control ep
xhci_hcd 0000:05:00.0: WARN: short transfer on control ep
xhci_hcd 0000:05:00.0: WARN: short transfer on control ep


I've trimmed  the detailed dmesg here if it helps ...

xhci_hcd 0000:05:00.0: WARN: short transfer on control ep
xhci_hcd 0000:05:00.0: Waiting for status stage event
xhci_hcd 0000:05:00.0: Event ring deq = 0xbac064d0 (DMA)
xhci_hcd 0000:05:00.0: // Write event ring dequeue pointer, preserving EHB bit
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc90017d40638,
64'hbac064d0, 4'hf);
xhci_hcd 0000:05:00.0: xhci_handle_event - returned from handle_tx_event
xhci_hcd 0000:05:00.0: In xhci_handle_event
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc90017d40638,
64'hbac064d8, 4'hf);
xhci_hcd 0000:05:00.0: op reg status = 00000008
xhci_hcd 0000:05:00.0: ir set irq_pending = 00000003
xhci_hcd 0000:05:00.0: Event ring dequeue ptr:
xhci_hcd 0000:05:00.0: @bac064d0 bac06940 00000000 01000000 01018001
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc90017d40024,
32'h8, 4'hf);
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc90017d40620,
32'h3, 4'hf);
xhci_hcd 0000:05:00.0: In xhci_handle_event
xhci_hcd 0000:05:00.0: xhci_handle_event - OS owns TRB
xhci_hcd 0000:05:00.0: xhci_handle_event - calling handle_tx_event
xhci_hcd 0000:05:00.0: In handle_tx_event
xhci_hcd 0000:05:00.0: handle_tx_event - ep index = 0
xhci_hcd 0000:05:00.0: handle_tx_event - checking for list empty
xhci_hcd 0000:05:00.0: handle_tx_event - getting list entry
xhci_hcd 0000:05:00.0: handle_tx_event - looking for TD
xhci_hcd 0000:05:00.0: handle_tx_event - found event_seg = ffff88023268b840
xhci_hcd 0000:05:00.0: Event TRB with TRB type ID 32
xhci_hcd 0000:05:00.0: Offset 0x00 (buffer lo) = 0xbac06940
xhci_hcd 0000:05:00.0: Offset 0x04 (buffer hi) = 0x0
xhci_hcd 0000:05:00.0: Offset 0x08 (transfer length) = 0x1000000
xhci_hcd 0000:05:00.0: Offset 0x0C (flags) = 0x1018001
xhci_hcd 0000:05:00.0: DMA address or buffer contents= 3133172032
xhci_hcd 0000:05:00.0: Successful control transfer!
xhci_hcd 0000:05:00.0: Ring deq = 0xbac06930 (DMA)
xhci_hcd 0000:05:00.0: Ring deq = 0xbac06940 (DMA)
xhci_hcd 0000:05:00.0: Ring deq = 0xbac06950 (DMA)
xhci_hcd 0000:05:00.0: Event ring deq = 0xbac064e0 (DMA)
xhci_hcd 0000:05:00.0: // Write event ring dequeue pointer, preserving EHB bit
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc90017d40638,
64'hbac064e0, 4'hf);
xhci_hcd 0000:05:00.0: Giveback URB ffff88023241c0c0, len = 16, status = 0
xhci_hcd 0000:05:00.0: xhci_handle_event - returned from handle_tx_event
xhci_hcd 0000:05:00.0: In xhci_handle_event
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 64'hffffc90017d40638,
64'hbac064e8, 4'hf);
xhci_hcd 0000:05:00.0: Queueing ctrl tx for slot id 1, ep 0
xhci_hcd 0000:05:00.0: Endpoint state = 0x1
xhci_hcd 0000:05:00.0: Ring enq = 0xbac06960 (DMA)
xhci_hcd 0000:05:00.0: Ring enq = 0xbac06970 (DMA)
xhci_hcd 0000:05:00.0: Ring enq = 0xbac06980 (DMA)
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc90017d40804,
32'h1, 4'hf);
xhci_hcd 0000:05:00.0: op reg status = 00000008
xhci_hcd 0000:05:00.0: ir set irq_pending = 00000003
xhci_hcd 0000:05:00.0: Event ring dequeue ptr:
xhci_hcd 0000:05:00.0: @bac064e0 bac06960 00000000 0d0000d5 01018001
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc90017d40024,
32'h8, 4'hf);
xhci_hcd 0000:05:00.0: `MEM_WRITE_DWORD(3'b000, 32'hffffc90017d40620,
32'h3, 4'hf);
xhci_hcd 0000:05:00.0: In xhci_handle_event
xhci_hcd 0000:05:00.0: xhci_handle_event - OS owns TRB
xhci_hcd 0000:05:00.0: xhci_handle_event - calling handle_tx_event
xhci_hcd 0000:05:00.0: In handle_tx_event
xhci_hcd 0000:05:00.0: handle_tx_event - ep index = 0
xhci_hcd 0000:05:00.0: handle_tx_event - checking for list empty
xhci_hcd 0000:05:00.0: handle_tx_event - getting list entry
xhci_hcd 0000:05:00.0: handle_tx_event - looking for TD
xhci_hcd 0000:05:00.0: Offset 0x00 (buffer lo) = 0xbac06960
xhci_hcd 0000:05:00.0: Offset 0x04 (buffer hi) = 0x0
xhci_hcd 0000:05:00.0: Offset 0x08 (transfer length) = 0xd0000d5
xhci_hcd 0000:05:00.0: Offset 0x0C (flags) = 0x1018001
xhci_hcd 0000:05:00.0: DMA address or buffer contents= 3133172064
xhci_hcd 0000:05:00.0: WARN: short transfer on control ep


Thanks,
Jeff
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