RE: [PATCH RFC v8] MUSB: DA8xx/OMAP-L1x glue layer

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Hi,
> -----Original Message-----
> From: Sergei Shtylyov [mailto:sshtylyov@xxxxxxxxxx]
> Sent: Friday, May 14, 2010 2:59 PM
> To: Gupta, Ajay Kumar
> Cc: Sergei Shtylyov; linux-usb@xxxxxxxxxxxxxxx; davinci-linux-open-
> source@xxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH RFC v8] MUSB: DA8xx/OMAP-L1x glue layer
> 
> Hello.
> 
> Gupta, Ajay Kumar wrote:
> 
> >> -----Original Message-----
> >> From: davinci-linux-open-source-
> >> bounces+ajay.gupta=ti.com@xxxxxxxxxxxxxxxxxxxx [mailto:davinci-linux-
> open-
> >> source-bounces+ajay.gupta=ti.com@xxxxxxxxxxxxxxxxxxxx] On Behalf Of
> Sergei
> >> Shtylyov
> >> Sent: Wednesday, May 12, 2010 11:42 PM
> >> To: linux-usb@xxxxxxxxxxxxxxx
> >> Cc: davinci-linux-open-source@xxxxxxxxxxxxxxxxxxxx
> >> Subject: [PATCH RFC v8] MUSB: DA8xx/OMAP-L1x glue layer
> >>
> >> Texas Instruments DA8xx/OMAP-L1x glue layer for the MUSBMHRDC driver.
> >>
> >> Signed-off-by: Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx>
> >> Signed-off-by: Yadviga Grigorieva <yadviga@xxxxxxxxxxxxx>
> >>
> >> ---
> >> The patch is against the recent Linus' tree.
> >>
> >> WARNING: the MUSB and OHCI drivers will only work if your boot loader
> >> leaves
> >> the DA8xx boot configuration registers unlocked, otherwise they will
> lock
> >> up
> >> the kernel!
> >>
> >> Changes since the previous version:
> >> - removed DMA related code (to be added back by a later patch);
> >> - removed spurious interrupt message from da8xx_interrupt();
> >> - added a check for USB 1.1 being clocked from USB 2.0 PHY to
> phy_off();
> >> - moved USB register #define's from cppi41_dma.h in another patch,
> adding
> >>   'DA8XX_' prefix to them;
> >> - s/DA8XX_[RT]X_EP_MASK/DA8XX_USB_[RT]X_EP_MASK/,
> s/DA8XX_[RT]X_INTR_MASK/
> >>   DA8XX_INTR_[RT]X_MASK/, also reordered these macros;
> >> - used IO_ADDRESS() macro in #define CFGCHIP2 to avoid having to export
> >>   'da8xx_syscfg0_base' for modular build;
> >> - removed setting 'musb->is_active' from the code handling DRVVBUS
> >> interrupt;
> >> - moved the transceiver initialization further down in
> >> musb_platform_init();
> >> - moved s/ARCH_DAVINCI/ARCH_DAVINCI_DMx/ change into the separate
> patch;
> >> - fixed up some comments;
> >> - fixed reject in musb_core.h...
> >>
> >>  drivers/usb/musb/Kconfig     |    5
> >>  drivers/usb/musb/Makefile    |    4
> >>  drivers/usb/musb/da8xx.c     |  492
> >> +++++++++++++++++++++++++++++++++++++++++++
> >>  drivers/usb/musb/musb_core.h |    1
> >>  4 files changed, 501 insertions(+), 1 deletion(-)
> >>
> > [..]
> >> + * REVISIT (PM): we should be able to keep the PHY in low power mode
> most
> >> + * of the time (24 MHz oscillator and PLL off, etc.) by setting
> POWER.D0
> >> + * and, when in host mode, autosuspending idle root ports... PHY_PLLON
> >> + * (overriding SUSPENDM?) then likely needs to stay off.
> >> + */
> >> +
> >> +static inline void phy_on(void)
> >> +{
> >> +	u32 cfgchip2 = __raw_readl(CFGCHIP2);
> >> +
> >> +	/*
> >> +	 * Start the on-chip PHY and its PLL.
> >> +	 */
> >> +	cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN |
> >> CFGCHIP2_OTGPWRDN);
> >> +	cfgchip2 |= CFGCHIP2_PHY_PLLON;
> >
> > How about values USB0REF-FREQ, USB0DATPOL, USB0OTGMODE bits ? Are they
> > Getting set elsewhere or default value is good to go?
> 
>     Of course, they are initialized in the platfrom code, where this
> stuff really belongs -- see da830_evm_usb_init() in
> arch/arm/mach-davinci/board-da830-evm.c...
> 
> >> +	__raw_writel(cfgchip2, CFGCHIP2);
> >> +
> >> +	pr_info("Waiting for USB PHY clock good...\n");
> >> +	while (!(__raw_readl(CFGCHIP2) & CFGCHIP2_PHYCLKGD))
> >> +		cpu_relax();
> >
> > It's good to have a timeout here. I have seen this bit not
> > getting updated in some scenarios on AM3517 and also on
> 
>     It's not updated if SYSCFG registers are locked by U-Boot on DA8xx.
> 
> > PUMA5 platforms which would cause a system lockup here.
> 
>     Well, but what to do if it's not set in time? Fail loading of the
> driver?
Not fail as I have seem OTG port to be working fine even when this
bit is not set. Something strange..

-Ajay

> 
> > -Ajay
> 
> WBR, Sergei
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